1. Field of the Invention
This invention relates to microcomputers. More specifically, this invention relates to a PWM (pulse width modulation) signal generating circuitry which drives a unit to be controlled such as an inverting device.
2. Related Art
Conventionally, when a three-phase motor is driven by using an inverting device, the inverting device is controlled by a PWM signal. In general, a PWM control is a method for controlling the inverting devices by using a fundamental wave of a pulse period known as a carrier wave and changing a duty (active level) of the fundemental wave. And, it is well known that the inverting device includes two transistors which are connected in series between a power supply and a ground (GND), and the two transistors are cyclicly turned on and off in a complementary relation. In practice, however, because of a delay of a gate input signal and a variation of on-off characteristics of the transistors, it is in some cases that both of the two transistors are turned on at the same time so that an excessive current flows. The excessive current may break the transistors.
In general, to avoid such problems, it has been an ordinary practice that the gate input signals of the inventing devices have a period for ensuring that both transistors turn off. That period is called a dead time.
Now, a construction and an operation of the prior microcomputer generating PWM signals will be briefly described with reference to FIGS. 1 and 2.
FIG. 1 is a block diagram of the construction of the prior microcomputer. The prior microcomputer includes a timer 101 and a compare register 102. The timer 101 is used as a counter of a period of the carrier wave and a counter of a set-reset timing of the PWM waveform. The compare register 102 is a register which sets the time period of the carrier wave (carrier frequency). The compare register 102 compares the value of the timer 101 with a comparison value set in the compare register itself, and generates a periodical interrupt signal 103 when a coincidence is detected.
The microcomputer also has three control blocks 110, 120 and 130 which have the same construction. The control block 110 consists of four compare registers 111, 112, 113 and 114, and two set-reset flipflops (RS-F/F) 115 and 116.
It is well known that a three-phase motor has three phases which are called U-phase, V-phase and W-phase, respectively. In case of driving these three-phases by using the inventing devices, the microcomputer outputs control signals U and U for the U-phase, control signals V and V for the V-phase and control signals W and W for the W-phase. In the figures, the three-phase motor can be controlled by controlling the U-phase by using the control block 110, controlling the V-phase by using the control block 120 and controlling the W-phase by using the control block 130.
Now, the operation of the microcomputer shown in FIG. 1 will be described with reference to FIG. 2 illustrating a timing diagram.
The timer 101 performs a freerunning-counter action. The compare register 102 connected to the timer 110 compares the value of the timer 101 with the set comparison value. In this comparison action, the compare register 102 has set a value "a" as a comparison value at first stage. In case of the value of the timer 101 coinciding the value "a", the compare register 102 detects the coincidence of both values and generates the interrupt signal 103. The following process will be practiced by a software process at the time of the input of the interrupt signal 103. And the interrupt signal 103 sets up the value "b" which provides a time period width of the next period to the compare register 102 as a comparison value.
A value "c1" is set to the compare register 114, and a value "d1" is set to the compare register 111 respectively. In case of a coincidence of the value of timer 101 with the value "c1" or the value "d1", the control signal U will be set and the control signal U will be reset.
If the compare register 111 detects a coincidence of the value of the timer 101 and the value "d1", the interrupt signal 117 will be generated. In response to the interrupt signal 117, the compare register 114 will be set with the value "c2", and the compare register 111 will be set with the value "d2" by a software process, in order to determine the timing used in the next PWM time period.
And, a value "e1" is set to the compare register 112, and a value "f1" is set to the compare register 113 respectively. In case of a coincidence of the value of timer 101 with the value "e1" or the value "f1", the control signal U will be set and the control signal U will be reset. If the compare register 113 detects a coincidence of the value of the timer 101 and the value "f1", the interrupt signal 118 will be generated. In Response to the interrupt signal 118, the compare register 112 will be set with the value "e2", and the compare register 113 will be set with the value "f2" by a software process, in order to determine the timing used in the next PWM time period.
The prior microcomputer generates the PWM signal under the above-mentioned respective processes. The U-phase operation has been described in this example, however the operations of the V-phase and the W-phase are the same as the U-phase operation.
That is, the V-phase signal sets a comparison value to respective compare registers by the interrupt signals 127 and 128, and the W-phase signal sets comparison values to respective compare registers by the interrupt signals 137 and 138.
As above mentioned, the prior art microcomputer sets up the various set values such as the time period of the carrier wave, the timing of the set-reset of the PWM signal of each output, the dead time of the period of the active level (a low level in this case) of the control signals U and U, the control signals V and V, and the control signals W and W necessary for the drive of the inverting devices. As shown in FIG. 1, the number of the compare registers setting the comparison values is 13 in the case of three-phase motor control.
And also, it will be seen that the number of the interrupts (the number of the interrupt signals) generated in one period of the PWM time period is 7, shown as the Reference Numbers 103, 117, 118, 127, 128, 137 and 138.
A problem of the microcomputer for driving the inverter controlled by the prior PWM control is an increase of the interruption number and therefor an increase of the necessary time for a software process. Because the set of the period of the time period of the carrier wave, the set of the timing of set and reset of the PWM signal including dead time are set up by an operation process of the software, interrupting the CPU as occasion arises. And such problems cause the microcomputer for driving the inverter controlled by the prior PWM control not to be able to control a high speed motor whose carrier wave frequency is 15.about.20 KHz.